1. Field of the Invention
The present invention relates to the field of bias sources adapted to set a biasing current to a predetermined value, this current then being replicated to supply different sub-assemblies of an electronic circuit. The present invention more specifically relates to bias sources implemented by means of bipolar transistors.
2. Discussion of the Related Art
FIG. 1 shows an example of conventional diagram of a Vbe/R bias source. Such a bias source includes a first reference branch, formed of a resistor R connected in series with a bipolar transistor T1 between two supply lines Vcc and Vee, and a second output branch, formed of a bipolar transistor T2 connected in series with a resistor R.sub.pol between one of the supply lines and an output terminal 1 of the bias source. In the example shown in FIG. 1, the bias source is a current sink and transistors T1 and T2 are NPN transistors. The collector of transistor T1 is connected to line Vcc (of positive supply) via resistor R of biasing of the assembly and the emitter of transistor T1 is connected to line Vee (generally, the ground). The base of transistor T1 is connected to the emitter of transistor T2, the collector of which forms output terminal 1. The base of transistor T2 is connected to the collector of transistor T1. The emitter of transistor T2 is connected to line Vee via resistor R.sub.pol meant to set the value of current I.sub.out generated by the bias source. The reproduction of current I.sub.out or of its multiple, to bias different sub-assemblies of the circuit associated with the bias source shown in FIG. 1, is performed by means of transistors connected as a current mirror between terminal 1 and supply line Vcc. A first PNP-type bipolar transistor Q is diode-mounted between supply line Vcc and terminal 1, and other bipolar transistors Q' are connected as current mirrors on this transistor Q. The number of transistors Q' depends on the number of sub-assemblies to be biased and the respective surface ratios between a transistor Q' and transistor Q set the proportionality ratio between current I.sub.out and the biasing current of the corresponding sub-assembly. In FIG. 1, transistors Q and Q' have been shown in dotted lines, since they do not belong to the actual bias source.
A disadvantage of such a bias source is that current I.sub.out depends on the value of supply voltage Vcc.
To evaluate the dependence of the output current with respect to the supply voltage, parameter S which, by definition, represents the variation percentage of a current divided by the variation percentage of a voltage, or conversely, can be used.
Thus, parameter S.sub.V.sbsb.cc.sup.I.sbsp.out represents the variation percentage of the output current (dI.sub.out /I.sub.out) divided by the variation percentage of the supply voltage (dV.sub.cc /V.sub.c c).
Among the equations governing the assembly of FIG. 1, neglecting the base currents of the transistors, one can write: ##EQU1## where Ie.sub.2 represents the emitter current of transistor T2, Vt represents the thermodynamic voltage, Is.sub.1 represents the saturation current of transistor T1 which depends on technological parameters (base doping, base width, etc.) and on the emitter surface and is independent from the supply voltage, and Iref is the reference current flowing through resistor R.
By differentiating this formula with respect to Vcc, parameter S can be expressed as follows: ##EQU2## where S.sub.V.sbsb.cc.sup.I.sbsp.out represents the variation percentage of current I.sub.ref divided by the variation percentage of supply voltage Vcc.
Now, for a sufficiently high supply voltage Vcc (for example, approximately 10 volts), parameter S.sub.V.sbsb.cc.sup.I.sbsp.ref can be considered to be equal to 1. Indeed, I.sub.ref =(Vcc-Vbe.sub.1 -Vbe.sub.2)/R, where Vbe.sub.2 represents the base-emitter voltage of transistor T2, and the base-emitter voltage drops can then be neglected with respect to the supply voltage. Conversely, the presence of a term in 1/I.sub.out in parameter S.sub.V.sbsb.cc.sup.I.sbsp.out while all other terms (Vt, R.sub.pol, and S.sub.V.sbsb.cc.sup.I.sbsp.ref are constant clearly shows the dependence of the output current with respect to the supply voltage.
As a specific example, for a thermodynamic voltage Vt of 26 mV at 25.degree. C. and for a resistance R.sub.pol of 6.6 k .OMEGA., a current I.sub.ou t of approximately 113.8 .mu.A is obtained for a voltage Vcc of 10 V. For a 10% variation of supply voltage Vcc, a variation of the output current of approximately 0.4% is obtained.
FIG. 2 shows an example of conventional diagram of a so-called "crossed" or ".DELTA.Vbe/R" bias source. Such a .DELTA.Vbe/R source includes, between supply lines Vcc and Vee, a first branch provided with, in series, a resistor R, a PNP transistor T3, a diode-connected NPN transistor T4, and an NPN transistor T5, and a second branch provided with, in series, a resistor R, a diode-connected PNP transistor T6, two NPN transistors T7 and T8 and a resistor R.sub.pol. It is assumed in this example that the output current I.sub.out corresponding to the collector current of transistor T6 is a current "entering" into the bias source. The bases of transistors T3 and T6 are connected to the collector of transistor T6. The bases of transistors T4 and T7 are connected to the collector of transistor T4. The emitter of transistor T7 is connected to the base of transistor T5 and to the collector of transistor T8. The emitter of transistor T4 is connected to the base of transistor T8 and to the collector of transistor T5. Resistors R are optional.
As previously, one or several transistors (Q', FIG. 1) are connected as current mirrors on transistor T6 to bias the different sub-assemblies of the circuit.
The operation of such a .DELTA.Vbe/R bias source is perfectly well known. The value of current I.sub.out is given, neglecting the base currents, by the following relation: ##EQU3## where S3, S4, S6, S7 represent the respective emitter surfaces of transistors T3, T4, T6, and T7, Vce.sub.6 represents the collector-emitter voltage of transistor T6, and V.sub.AFNPN designates the Early voltage of transistor T6 and reflects the output impedance of this bipolar transistor.
In this formula, the only term which is variable according to supply voltage Vcc is the collector-emitter voltage of transistor T6. Indeed, this voltage can be expressed as Vcc-2Vbe. Accordingly, when the supply voltage increases, voltage Vce.sub.6 increases and output current I.sub.out decreases, since ratio Vce.sub.6 /V.sub.AFNPN is not negligible with respect to 1.
In a .DELTA.Vbe/R bias source, a variation of supply voltage Vcc of approximately 10% results in a variation of the output current of approximately 0.6%. It should however be noted that the output current variation is inverted with respect to a Vbe/R bias source. Indeed, the variation of the biasing current with respect to the nominal value for which the bias source is sized is negative for an increase of supply voltage Vcc with respect to its nominal value. In a Vbe/R bias source, this variation is positive.
Another distinction between the Vbe/R and .DELTA.Vbe/R bias sources is the sign of their respective temperature variation coefficient. In a Vbe/R source, the temperature variation coefficient is negative, that is, the biasing current decreases with a temperature increase, whereas this coefficient is positive for a .DELTA.Vbe/R source. The respective temperature variation coefficients of the Vbe/R and .DELTA.Vbe/R sources are generally on the order of 1.5+10-3/.degree. C. and +1.5.times.10.sup.-3 /.degree. C., respectively.
A .DELTA.Vbe/R source has, compared with a Vbe/R source, several disadvantages. First, it requires many more components. Further, it requires a circuit 2 (FIG. 2) for starting this bias source which effectively exhibits two steady states. Such a starting system is formed either of a resistor of high value, or of a field-effect transistor which has the disadvantage of causing a permanent power consumption, or of a still more complex electronic system.